Bit Set
Instruction Parameters
Supported PLC Series
| XPnA/1R | XPnB | XPnE | XPnF | CP3A/B/P/U CP4A~D/U | CPnE | CPnF | BP | PLC-S |
|---|---|---|---|---|---|---|---|---|
| ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Supported Data Registers
| M | X | Y | K | L | F | T | C | S | Z | R | Q | D | @D | Constant | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| D | ✓ | - | ✓ | ✓ | ✓ | - | ✓ | ✓ | - | ✓ | ✓ | ✓ | ✓ | ✓ | - |
| n | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | - | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Supported Flags
| Flag | Bit | Support |
|---|---|---|
| Error | F11.0 | ✓ |
| Zero | F11.1 | - |
| Carry | F11.2 | - |
Number of Steps
| Steps |
|---|
| 3 |
Operands
| Operand | Description |
|---|---|
| D | The first operand. Entries are only WORD data registers. This is the location of the data register to set the bit, n to ON. |
| n | The second operand. Entries are WORD data registers or constants. This is the bit number of the data register, D, to set to ON. The value range is 0 ~ 15. |
Notice
Error Flag (F11.0) Notice
The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type.
Instruction Behavior
The BSET and BSETP instructions behave as follows:
- The value, n, is value from 0 ~ 15.
- If the value, n, is greater than 15, the remainder from n ÷ 16 is the equivalent.
- Example: if n = 17, the remainder is 1. This is the same as S2 = 1.
- If the value, n, is greater than 15, the remainder from n ÷ 16 is the equivalent.
- Bits turned ON by either instruction.
- Bits can be turned OFF with the BRST or BRSTP