Link Data

Instruction Parameters

Supported PLC Series

XPnA/1R	XPnB	XPnE	XPnF	CP3A/B/P/U CP4A~D/U	CPnE	CPnF	BP	PLC-S
✓	✓	✓	✓	✓	✓	✓	✓	✓

Supported Data Registers

	M	X	Y	K	L	F	T	C	S	Z	R	Q	D	@D	Constant
S	✓	✓	✓	✓	✓	✓	✓	✓	-	✓	-	✓	✓	✓	-
D	✓	-	✓	✓	✓	-	✓	✓	-	✓	-	✓	✓	✓	-
n	✓	✓	✓	✓	✓	✓	✓	✓	-	✓	✓	✓	✓	✓	✓

Supported Flags

Flag	Bit	Support
Error	F11.0	✓
Zero	F11.1	-
Carry	F11.2	-

Number of Steps

Steps
4

Operands

Operand	Description
S	The first operand. Entries are only NIBBLE data registers. This is the data to be linked.
D	The second operand. Entries are only WORD data registers. This is where the linked data of S is saved.
n	The third operand. Entries are WORD data registers or constants. This is the amount of NIBBLEs to link. The value range is 1 ~ 4.

Notice

Error Flag (F11.0) Notice

The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type.

F11.0 turns ON when the value of the data for n is not in range of 1 ~ 4.

Instruction Behavior

The UNI and UNIP instructions behave as follows:

• When less than 4 NIBBLEs are linked, the more significant bits of the data register, D, are set to OFF (0).
• The least significant NIBBLE stored in the data register, S, is distributed to the bit 0 ~ 3 of the data register, D.

Examples

• Ladder Diagram