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Force Stop Batch Program

Instruction Parameters

Supported PLC Series

XPnA/1RXPnBXPnEXPnFCP3A/B/P/U
CP4A~D/U
CPnECPnFBPPLC-S
--

Supported Load Cell Modules

ModuleChannels
CM1-WG02C2 Channels
CM1-WG02D2 Channels
CM1-WG02E2 Channels

Supported Data Registers

MXYKLFTCSZRQD@DConstant
Base/Slot--
S-----
D-------

Supported Flags

FlagBitSupport
ErrorF11.0
ZeroF11.1-
CarryF11.2-

Number of Steps

Steps
4

Operands

OperandDescription
Base/SlotThe first operand.
Entries are Hexadecimal data registers or constants.
This is the base and slot number where the load cell is located.

This location depends on the amount of expansion modules the chassis contains.
SThe second operand.
Entries are WORD data registers or constants.
This is the channel number where the embedded batch program is located.

The value range is 1 ~ 4.
DThe third operand.
Entries are only WORD data registers.
This is where the result of the batch program execution is stored.

Assignment Example

The following example shows how to assign values to Base/Slot.

Base/Slot (CM1)

Base NumberSlot Number
H0A0B
Hexadecimal2 Digits in Hexadecimal2 Digits in Hexadecimal
Base NumberSlotExample
Local BaseSlot Number 5H0005 or 5
1st ExpansionSlot Number 3H0103
10th ExpansionSlot Number 7H0A07
14th ExpansionSlot Number 12H0E0C
16th ExpansionSlot Number 10H100A

IMPORTANT: Base Number and Slot Number have specific parameters:

  • Base Number and Slot Number could be different according to the PLC CPU and base type.
  • Base Number:
    • Local base: H00
    • Expansion range: H01 ~ H10
  • Slot Number:
    • Range: H00 ~ H0B

D Data Register Result

Result TypeBitsDescription
Error CodeH00No error
Error CodeH01Base/Slot invalid
Error CodeH10Module busy
Operation StatusBit 01 when the instruction executes
Operation StatusBit 11 when instruction execution finishes
Operation StatusBit 21 when an error occurs
Simultaneously sets with Bit 1
Operation StatusBit 3 ~ 7Reserved

Notice

Error Flag (F11.0) Notice

The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type.

Examples