Duty Cycle Control
Instruction Parameters
Supported PLC Series
| XPnA/1R | XPnB | XPnE | XPnF | CP3A/B/P/U CP4A~D/U | CPnE | CPnF | BP | PLC-S |
|---|---|---|---|---|---|---|---|---|
| ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
Supported Data Registers
| M | X | Y | K | L | F | T | C | S | Z | R | Q | D | @D | Constant | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| n1 | ✓ | - | - | ✓ | ✓ | ✓ | ✓ | ✓ | - | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
| n2 | ✓ | - | - | ✓ | ✓ | ✓ | ✓ | ✓ | - | ✓ | ✓ | ✓ | ✓ | ✓ | ✓ |
| D | - | - | - | - | - | ✓ | - | - | - | - | - | - | - | - | - |
Supported Flags
| Flag | Bit | Support |
|---|---|---|
| Error | F11.0 | ✓ |
| Zero | F11.1 | - |
| Carry | F11.2 | - |
Number of Steps
| Steps |
|---|
| 4 |
Operands
| Operand | Description |
|---|---|
| n1 | The first operand. Entries are WORD data registers or constants. This is the number of scans that the user clock is ON. The value range is 1 ~ 32,767. |
| n2 | The second operand. Entries are WORD data registers or constants. This is the number of scans that the user clock is OFF. The value range is 1 ~ 32,767. |
| D | The third operand. Entries are only BOOL data registers. This is the address of the user clock. The data register range is F10.0 ~ F10.7. |
Notice
Error Flag (F11.0) Notice
The error flag, F11.0, will be ON for one scan when the address of the data register assigned by @D exceeds the range of the data register, D. The range of the data register, D, is dependent on the CPU type.
Instruction Behavior
The DUTY instruction behaves as follows:
- Once energized, the assigned user clock turns ON and OFF continuously.
- This is true even if the execution condition is OFF.
- Only positive numbers can be assigned to n1 and n2.
- The error flag, F11.0, will be ON if either value is negative.
- Only the BOOL data registers, F10.0 ~ F10.7, can be assigned to the data register, D.
- If the value assigned to either n1 or n2 changes while the execution condition is ON, the change is immediately applied to the user clock assigned to the data register, D.