CM3 AD/DA Module Internal I/O Table
CM3-SP04EAA Internal I/O Table
| CM3-SP04EAA Internal I/O Signal Table | |||
|---|---|---|---|
| Direction of Signal CM3-SP04EAA → CPU | Direction of Signal CPU → CM3-SP04EAA | ||
| Input | Name of Signal | Output | Name of Signal |
| Xn.0 | AD Module Ready | Yn.0 | Reserved |
| Xn.1 | Reserved | Yn.1 | |
| Xn.2 | Flag indicating the operation condition setup | Yn.2 | Requesting to set up an operation condition |
| Xn.3 | Channel 1 High Alarm Value | Yn.3 | DA Channel 1 Output Enable |
| Xn.4 | Channel 2 High Alarm Value | Yn.4 | DA Channel 2 Output Enable |
| Xn.5 | Channel 1 Low Alarm Value | Yn.5 | Reserved |
| Xn.6 | Channel 2 Low Alarm Value | Yn.6 | |
| Xn.7 | Channel 1 Maximum Alarm Value | Yn.7 | |
| Xn.8 | Reserved | Yn.8 | |
| Xn.9 | Yn.9 | ||
| Xn.A | Yn.A | ||
| Xn.B | Yn.B | ||
| Xn.C | Yn.C | ||
| Xn.D | Yn.D | ||
| Xn.E | Yn.E | ||
| Xn.F | AD Module Error Flag | Yn.F | Requesting to Clear Error Flag |
Allocation Example
The CM3-SP04EAA is allocated one WORD of X (Xn.0 ~ Xn.F) and one WORD of Y (Yn.0 ~ Yn.F).
n is a number representing the CM3-SP04EAA's position within the chassis.
To access the X memory registers for the CM3-SP04EAA, the X value range is X2.0 ~ X2.F.
To access the Y memory registers for the CM3-SP04EAA, the Y value range is Y2.0 ~ Y2.F.