CM3 PWM Module Internal I/O Table
CM3-SP32PWM Internal I/O Table
| CM3-SP32PWM Internal I/O Signal Table | |||
|---|---|---|---|
| Direction of Signal: CPU → CM3-SP32PWM | |||
| Output | Name of Signal | Output | Name of Signal |
| Yn.0 | General Digital Output | Yn+1.0 | General Digital Output |
| Yn.1 | General Digital Output | Yn+1.1 | General Digital Output |
| Yn.2 | Frequency A Channel 1 PWM or General Digital Output | Yn+1.2 | Frequency C Channel 9 PWM or General Digital Output |
| Yn.3 | Frequency A Channel 2 PWM or General Digital Output | Yn+1.3 | Frequency C Channel 10 PWM or General Digital Output |
| Yn.4 | General Digital Output | Yn+1.4 | Frequency C Channel 11 PWM or General Digital Output |
| Yn.5 | General Digital Output | Yn+1.5 | Frequency C Channel 12 PWM or General Digital Output |
| Yn.6 | Frequency A Channel 3 PWM or General Digital Output | Yn+1.6 | General Digital Output |
| Yn.7 | Frequency A Channel 4 PWM or General Digital Output | Yn+1.7 | General Digital Output |
| Yn.8 | General Digital Output | Yn+1.8 | General Digital Output |
| Yn.9 | General Digital Output | Yn+1.9 | General Digital Output |
| Yn.A | Frequency B Channel 5 PWM or General Digital Output | Yn+1.A | General Digital Output |
| Yn.B | Frequency B Channel 6 PWM or General Digital Output | Yn+1.B | General Digital Output |
| Yn.C | Frequency B Channel 7 PWM or General Digital Output | Yn+1.C | General Digital Output |
| Yn.D | Frequency B Channel 8 PWM or General Digital Output | Yn+1.D | General Digital Output |
| Yn.E | General Digital Output | Yn+1.E | General Digital Output |
| Yn.F | General Digital Output | Yn+1.F | General Digital Output |
Allocation Example
The CM3-SP32PWM is allocated two WORDs, or one DWORD, of X (Xn.0 ~ Xn.F and Xn+1.0 ~ Xn+1.F) and two WORDs, or one DWORD, of Y (Yn.0 ~ Yn.F and Yn+1.0 ~ Yn+1.F).
n is a number representing the CM3-SP32PWM's position within the chassis.
To access the Y memory registers for the CM3-SP32PWM, the Y value range is Y2.0 ~ Y3.F.
Since the CM3-SP32PWM module is output only, the X registers don't need to be physically accessed.